Learn Chip Design - Blog #verificationLearn Chip Design - Blog #verificationhttps://www.learnchipdesign.com/blogs/tag/verificationFri, 07 Nov 2025 07:00:48 +0530http://zoho.com/sites/<![CDATA[UVM macros to make life easier]]>https://www.learnchipdesign.com/blogs/post/uvm-macros

While creating any new component or object in UVM we first register it with the factory,

We usually use the macros


 // Code 

`uvm_object_utils(my_sequence)   
function new(string name="my_sequence");     
super.new(name);   
endfunction

Most of the time I write nothi...

]]>Tue, 10 Sep 2024 23:26:41 +0530<![CDATA[Welcome to world of ASIC Verification ]]>https://www.learnchipdesign.com/blogs/post/welcome-to-world-of-asic-verificationSat, 11 May 2024 09:54:53 +0530<![CDATA[Different approach to the macro `uvm__analysis_imp_decl]]>https://www.learnchipdesign.com/blogs/post/Different-approach-to-uvm__analysis_imp_decl

INTRODUCTION:

We all know that whenever there are multiple monitors connected to a single scoreboard, we do the connection as mentioned in UVM Cookbook or uvm_user_guide by using the inbuild macro `uvm_analysis_imp_decl(_<string>) and then writing another analysis imp inside the scoreboard with...

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